/*
* Copyright (c) 2001, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* published by the Free Software Foundation.
*
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
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* 2 along with this work; if not, write to the Free Software Foundation,
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#ifndef CPU_PPC_VMREG_PPC_HPP
#define CPU_PPC_VMREG_PPC_HPP
inline bool is_Register() {
return (unsigned int)value() < (unsigned int)ConcreteRegisterImpl::max_gpr;
}
inline bool is_FloatRegister() {
return value() >= ConcreteRegisterImpl::max_gpr &&
value() < ConcreteRegisterImpl::max_fpr;
}
inline Register as_Register() {
assert(is_Register() && is_even(value()), "even-aligned GPR name");
return ::as_Register(value()>>1);
}
inline FloatRegister as_FloatRegister() {
assert(is_FloatRegister() && is_even(value()), "must be");
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